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Implement Minimum Convolution System with FPGA FLEX10K10(PDF)

《南京理工大学学报》(自然科学版)[ISSN:1005-9830/CN:32-1397/N]

Issue:
2001年01期
Page:
100-103
Research Field:
Publishing date:

Info

Title:
Implement Minimum Convolution System with FPGA FLEX10K10
Author(s):
LeiChun ZhangBaomin
School of Electronic Engineering and Optoelectronic Technology,NUST,Nanjing 210094
Keywords:
convolut ions processor rea-l time system image processing FP
PACS:
TN492
DOI:
-
Abstract:
In imaging processing such as f iltering, enhancing and edge detect ing, 2D convolut ion is of ten used. Convolut ion algorithm can be implemented in rea-l t ime w ith some special chip. But its price is so expensive that it can not be used on general occasion. Along w ith the appearance of FPGA, many algorithm including convrolution can be implemented w ith ease. Based on the MAXPLUS system of Altera Corporat ion, a convolut ion implementat ion scheme of video in real t ime is proposed in this paper. It s convolut ion w indow is 3×3; data w idth is 4bit × 8bit1Some advice has also been given here to be considered in design.

References:

1 赵典锋. 用FLEX10K 器件实现乘法器. 电子产品世界, 1997, 27( 9) : 10~ 14
2 宋万杰, 罗丰. CPLD 技术及其应用. 西安: 西安电子科技大学出版社, 1999. 35~ 60

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Memo:
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Last Update: 2013-03-25