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An Efficient Topologyical Arithmetic for Tearing Large Scale Circuits(PDF)

《南京理工大学学报》(自然科学版)[ISSN:1005-9830/CN:32-1397/N]

Issue:
2003年01期
Page:
24-27
Research Field:
Publishing date:

Info

Title:
An Efficient Topologyical Arithmetic for Tearing Large Scale Circuits
Author(s):
ShaTao SunJianhong SunXianjun
Department of Automation,NUST,Nanjing 210094
Keywords:
graph cut set s tearing technolog y adjacency mat rix
PACS:
O241
DOI:
-
Abstract:
The paper presents a topological arithmet ic of the tearing technology . In the v iew of minimum cutsets, the opt imized tearing is made. The method can get the minimum branch in the t ime of polynomial term. Based on the adjacency matrix of the network graph, the theoret ical proof of the topological arithmet ic is given. The pract ical applicat ions show the simplicity and ef ficiency of the arithmetic.

References:

1 庄文君, 李玉兴. 集成电路设计自动化[ M] . 上海: 上海交通大学出版社, 1986.
2 舒竖林, 徐志才. 图论基础及其应用[ M] . 北京: 北京邮电学院出版社, 1988.
3 Sun Xianjun. A new alg orithm for rout ing an opposite two free channel[ A] . In: Proceedings of ICCASS. 96[ C] . Shanghai: IEEE, 1996. 102~ 104.

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Last Update: 2013-03-17