[1]刘光祖,王建新,薛文,等.数字通信系统定时恢复环路滤波器研究[J].南京理工大学学报(自然科学版),2012,36(03):453-458.
 LIU Guang-zu,WANG Jian-xin,XUE Wen.Timing Recovery Loop Filter for Digital Communication Systems[J].Journal of Nanjing University of Science and Technology,2012,36(03):453-458.
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数字通信系统定时恢复环路滤波器研究
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《南京理工大学学报》(自然科学版)[ISSN:1005-9830/CN:32-1397/N]

卷:
36卷
期数:
2012年03期
页码:
453-458
栏目:
出版日期:
2012-06-30

文章信息/Info

Title:
Timing Recovery Loop Filter for Digital Communication Systems
作者:
刘光祖; 王建新; 薛文;
南京理工大学电子工程与光电技术学院;
Author(s):
LIU Guang-zuWANG Jian-xinXUE Wen
School of Electronic Engineering and Optoelectronic Technology,NUST,Nanjing 210094,China
关键词:
数字通信系统 定时恢复 环路滤波器 与滤波器
Keywords:
digital communication system timing recovery loop filter AND-filter
分类号:
TN713;TN914.3
摘要:
为了提高数字通信系统中定时恢复环路的跟踪性能,对其中的环路滤波器进行了研究。使用两种不同的环路滤波器分别进行定时捕获和跟踪。设计了一种自复位滤波器,并将其和与滤波器组合起来构成了一个新的环路滤波器。利用帧同步脉冲在这两种滤波器之间进行切换,从而兼顾了定时恢复环路的捕获和跟踪性能。仿真结果表明,在最差的初始条件下,新的环路滤波器在64个码元之内实现了定时捕获,且跟踪性能优良。该滤波器结构简单,适于在高速数字接收机上实现。
Abstract:
In order to improve the tracing performance of the timing recovery loop in digital communication systems,the loop filter is studied.Timing acquisition and tracing are carried out using two different loop filters.A self-reset filter is designed,and a novel loop filter is constructed by combining the self-reset filter with an AND-filter.The acquisition and tracing performances of the timing recovery loop are insured by using frame synchronization pulses to switch between the two filters.Simulation results show that the novel loop filter accomplishes timing acquisition within 64 symbols and presents reliable tracing performance even in the worst initial conditions.The filter structure is simple and suitable for high speed digital receiver.

参考文献/References:

[1] Rice M,Harris F. Polyphase filterbanks for symbol timing synchronization in sampled data receivers[A]. Proceedings of Military Communications[C]. Provo,USA: Institute of Electrical and Electronics Engineers Inc, 2002: 982-986.
[2] Rice M,Harris F. Loop control architectures for symbol timing synchronization in sampled data receivers[A]. Proceedings of Military Communications[C]. Provo, USA: Institute of Electrical and Electronics Engineers Inc, 2002: 987-991.
[3] Danesfahani R,Naser-Moghaddasi M,Mahlouji M. Symbol timing synchronization of DQPSK π/4-Signals using polyphase filterbanks [A]. The International Conference on“Computer as a Tool”[C]. Warsaw,Poland: Inst of Elec and Elec Eng Computer Society, 2007: 882-887.
[4] Mahlouji M,Danesfahani R. An investigation intotiming synchronization of π/4-DQPSK signals using gardner symbol timing error detection algorithm and polyphase filterbanks[A]. International Conference on Information and Communication Technologies: From Theory to Applications[C]. Damascus,Syria: IEEE, 2006: 2274-2278.
[5] Gardner F M. Interpolation in digital modems-part Ⅰ: Fundamentals[J]. IEEE Transactions on Communications, 1993, 41( 3) : 501-507.
[6] Erup L,Gardner F M,Harris R A. Interpolation in digital modems- partⅡ: Implementation and performance[J]. IEEE Transactions on Communications, 1993, 41 ( 6) : 998-1008.
[7] Zhang Lili,He Zhiming. A modified timing synchronization algorithm for QPSK in digital receiver[A]. 2011 2nd International Conference on Artificial Intelligence, Management Science and Electronic Commerce[C]. Dengfeng, China: IEEE Computer Society, 2011: 1821-1824.
[8] Inoue T,Tokunaga M,Mori S. Digital phase-locked loop constructed by AND-FILTER[A]. IEEE International Symposium on Circuits and Systems[C]. New Orleans,USA: IEEE, 1990: 2782-2785.
[9] Gardner F M. A BPSK/QPSK timing-error detector for sampled receivers[J]. IEEE Transactions on Communications, 1986, 34( 5) : 423-429.

更新日期/Last Update: 2012-10-12